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counter register

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Circuit Description

The RTLIB counter register. It is clocked by the rising edge of the clk input while the ena input is high.

Print version | Run this demo in the Hades editor (via Java WebStart)
Usage | FAQ | About | License | Feedback | Tutorial (PDF) | Referenzkarte (PDF, in German)
Impressum http://tams.informatik.uni-hamburg.de/applets/hades/webdemos/50-rtlib/20-registers/counter.html