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Hades Applets contents visual index introduction std_logic_1164 gatelevel circuits basic gates AND gates OR gates XOR and XNOR De Morgan complex gates AND12 gate simple decoder XOR variants 4-bit parity... 8-bit parity... 2x2 bit mult... Gray-code 7400 and 7486 seven-segmen... 7449 seven-s... Ascii decoder multiplexer ... multiplexer ... 74151 multip... 74154 decode... 74154 decode... priority enc... priority enc... Hamming code barrel-shifter delay models flipflops adders and arithm... counters LFSR and selftest memories programmable logic state-machine editor misc. demos I/O and displays DCF-77 clock relays (switch-le... CMOS circuits (sw... RTLIB logic RTLIB registers Prima processor D*CORE MicroJava Pic16 cosimulation Mips R3000 cosimu... Intel MCS4 (i4004) image processing ... [Sch04] Codeumsetzer [Sch04] Addierer [Sch04] Flipflops [Sch04] Schaltwerke [Sch04] RALU, Min... [Fer05] State-Mac... [Fer05] PIC16F84/... [Fer05] Miscellan... [Fer05] Femtojava FreeTTS | Several variants of XOR gates
Circuit Description
This applet shows four different realizations of a two-input XOR gate.
It is meant to highlight the point that (indefinitely) many different
but logically equivalent realizations exist for every logic function.
Which of the different variants is best depends on technological
constraints like the size, speed, and power-consumption of the available
basic and complex gates.
Click the input switches, or type the 'a', 'b', 'c', ... 'h' bindkeys to control the different XOR gates. The topmost circuit uses a single XOR-gate. While this seems the simplest realization, the basic XOR gate cannot be realized directly as a basic gate in standard VLSI technologies. The second circuit shows the standard expansion of the XOR function XOR(c,d) = (c & !d) | (!c & d).In the third circuit, de'Morgan rules have been used to rewrite the above expansion with NAND-gates instead of the AND-gates and OR-gate. Again, as demonstrated in the twelve-input AND-gate applet, the NAND-based realization is cheaper and faster in most current VLSI technologies. The fourth circuit shows how to realize the XOR function with a multiplexer and an inverter. This might seem a little odd at first, but multiplexers turn out to be very flexible building blocks. Many logic functions can be realized with surprisingly low number of multiplexers, based on clever assignments of the data and control inputs. This fact is used in a famous family of programmable logic devices, where multiplexers are used as the basic blocks to implement all logic functions including flipflops. For a live demonstration, visit the ACT1 demonstration applet pages. In this case, the higher cost of the multiplexers (as compared to basic gates) is more than outweighed by the great flexibility and the reduced number of external wires. Special logic synthesis algorithms have been developed to make efficient use of multiplexer-based structures.
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Print version | Run this demo in the Hades editor (via Java WebStart) | ||||
Usage | FAQ | About | License | Feedback | Tutorial (PDF) | Referenzkarte (PDF, in German) | ||||
Impressum | http://tams.informatik.uni-hamburg.de/applets/hades/webdemos/10-gates/11-xor/xor-variants.html |