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introduction std_logic_1164
gatelevel circuits
basic gates AND gates OR gates XOR and XNOR De Morgan complex gates AND12 gate simple decoder XOR variants 4-bit parity... 8-bit parity... 2x2 bit mult... Gray-code 7400 and 7486 seven-segmen... 7449 seven-s... Ascii decoder multiplexer ... multiplexer ... 74151 multip... 74154 decode... 74154 decode... priority enc... priority enc... Hamming code barrel-shifter delay models flipflops adders and arithm... counters LFSR and selftest memories programmable logic state-machine editor misc. demos I/O and displays DCF-77 clock relays (switch-le... CMOS circuits (sw... RTLIB logic RTLIB registers Prima processor D*CORE MicroJava Pic16 cosimulation Mips R3000 cosimu... Intel MCS4 (i4004) image processing ... [Sch04] Codeumsetzer [Sch04] Addierer [Sch04] Flipflops [Sch04] Schaltwerke [Sch04] RALU, Min... [Fer05] State-Mac... [Fer05] PIC16F84/... [Fer05] Miscellan... [Fer05] Femtojava FreeTTSAn AND gate can be replaced by an OR gate with both inverted inputs and outputs. Correspondingly, the OR gate can be replaced with an AND gate with both inverted inputs and outputs.
To explore the circuit, just click the corresponding switches, or type the following keys:
- a (buffer)
- b (inverter)
- s,d (AND2)
- f,g (INV-OR2-INV)
- w,e (OR2)
- r,t (INV-AND2-INV)