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Circuit Description

A parallel-load serial-out shift-register.

Use mouse-clicks or type the bindkeys 'c' and 'e' to control the clock and enable (load/nshift) inputs, and the bindkeys '0' .. '7' to control the data inputs.

All flipflops are connected to the same clock and reset signals. and are sensitive to the rising-edge of the clock signal. The multiplexers are controlled via the 'LOAD/nSHIFT' input. When 'LOAD/nSHIFT' is high during the rising-edge of the clock, the flipflops are loaded with the parallel input data. When 'LOAD/nSHIFT' is low during the rising-edge of the clock, the multiplexers connect subsequent stages, so that the register contents is shifted by one bit-position.

The default value on an idle RS-232 serial communication channel is high, while the start bit is low. This explains the constant input values for the first (bottom-most) flipflops. The next eight flipflops provide the actual input data, with the least-significant bit transmitted first. The next flipflops provide the optional parity bit and the required extra stop bit.