| Welcome to the Hades framework
Circuit Description
Welcome to the HADES applet demonstration website!
Each of the following web pages includes an interactive applet
to illustrate a few important topics
in discrete-event based simulation and digital logic design.
The first few pages in this chapter are meant as an introduction
to the concepts of digital simulation
and explain how to use the applet(s).
Naturally, you can always skip the introduction and come back later,
or read the tutorial (PDF)
instead of trying the introductory applets.
If you have a Java2 compatible browser and a fast internet connection,
the first applet should have started by now.
While we intend to provide a special (low-fat) applet version
of Hades for faster downloading in the future,
the applets currently use the full Hades class archive file.
The applet code size is about 5 MBytes,
which translates into the following download times:
- 25 minutes (sorry!) typical 56K modem connection,
- 10 minutes on a ISDN connection,
- 40 seconds on a 50KB/s DSL or cable modem connection,
- 5 seconds on a T1 or better high-speed connection.
However, the applet code will be downloaded only once
- unless you clear your browser cache or have set your browser
to not cache web pages.
A few of the later applets make use of additional Java class archives,
of about 100 KBytes each, which will be downloaded as needed.
The first applet consists of a few text objects and a 4-bit counter
driving a seven segment display. Click the left-mouse button on
the clock generator component to start and stop the clock,
or on the power-on-reset component to reset the counter.
This simple simulation setup already demonstrates several features
of the Hades simulation framework:
- simple user interface, including a schematics editor or viewer
- zoom, grid, magnetic grid, and layer manager options
- interactive I/O components like switches, clock generators, and displays
- gate-level circuits with all standard gates, complex gates, flipflops, etc.
- hierarchical circuits built from nested subdesigns
- real-time simulation to show and illustrate the timing of circuits
- visualization aids, e.g. glow-mode to show the current logical
value on signal wires
- integration of images and (FIG format) diagrams
If the applet does not start, please check that Java support is enabled
in your browser, and that the security settings are ok.
Please consult the
Usage
web page for a detailed explanation of system requirements, setup,
and known problems.
(By the way, the name HADES is the acronym for HAmburg DEsign System.
It is also a pun,
because quite a few students at our CS department seem to hate
their digital logic design courses.)
| | |
introduction
user-interface