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Circuit Description

This applet demonstrates the Quicksort Algorithm running on the Femtojava Multicycle Processor. Please see the Femtojava overview page for details about the RT-level hardware structure and the design flow and tools.

The applet directly loads the quicksort algorithm into the program ROM and some initial (unsorted) data into the main memory RAM. Again, the binary memory data dumps (mif files for RAM and ROM) were generated using the Sashimi Tool.

Now, you can start the simulation. If you want that the simulation runs automatic, just turn on the auto_clock, otherwise, you can control the clocks just clicking in manual_clock button.

The sort program needs about 5800 cicles to finish. The result can be found in the RAM memory, starting at address 20.