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Circuit Description

This applet shows the internal structure of the TTL-series 74154 decoder integrated circuit, which switches the G input onto 1 out of 16 outputs selected by the 4-bit address specified by the (D,C,B,A) inputs.

When used as an address decoder, the G1 and G2 inputs are simply connected to ground, implying that exactly one of the 16 output lines will be zero. However, the 74154 chip can also be used as a normal decoder with the data input connected to G1 and G2.

Obviously, the circuit consists of two separate 2:4 decoders for the (B,A) and (D,C) pair of address inputs and a matrix of 4x4 NAND gates, each of which is connected to one output of the first decoder and one output of the second decoder. This organization results in much lower hardware cost than the equivalent two-level structure built from 16 NAND gates with four inputs each.