The image above shows a thumbnail of the interactive Java applet embedded into this page. Unfortunately, your browser is not Java-aware or Java is disabled in the browser preferences. To start the applet, please enable Java and reload this page. (You might have to restart the browser.)

Circuit Description

This circuit decodes its four-bit input value into an ASCII letter ('A' .. 'P') bit pattern on a seven segment display. Naturally, a few compromises had to be made for some of the letters. For those letters that cannot be displayed at all, only the decimal point LED is activated.

In our T1 lab-course, this exercise is meant to provide additional training in logic design and minimization (using KV-maps). The resulting logical equations are then implemented and tested using the Lattice FPLD starter tools on a programmable device.