|TAMS / Java / Hades / applets: contents|
Gate-level componentsThe Hades framework includes a large library of simulation models for digital systems. All gate-level simulation models are based on the industry-standard VHDL std_logic_1164 multilevel logic system. While std_logic_1164 is slightly more complex than the simple 01X- or 01XZ-logic models, the option to model bus systems with floating ('Z') and weak ('H') values is a clear advantage. The use of std_logic_1164 also means that students will already be trained in a multilevel logic model from the beginnning.
The thumbnails below show three simple circuits built from Hades gate-level simulation models. Check the applet collection for the interactive versions of these circuits. From left to right:
Additional visualization aids are provided in the schematics editor to help understanding the behaviour of the circuits. For example, the dominant cyan and magenta colors used for the 'U' and 'X' logic values allow to identify un-initialized signals 'at a glance':
So far, the Hades simulation model library includes:
The following image shows the demonstration of a programmable GAL ("generic array logic") circuit. Three output cells are used, each of which provides four AND-gates (terms) with five inputs (A,B,X,Y,Z). Special interactive switches are used to model the fuses; simply clicking a switch changes the fuse status (intact/blown) and immediately updates the simulation. Click the thumbnail below for a larger screenshot, or click here for the interactive applet version of the GAL traffic light controller demo: