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Intel MCS4 (i4004) BCD subtraction

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Circuit Description

A realization of BCD subtraction on the i4004 microprocessor based on this assembly source: bcd_sub.asm.

; bcd_sub.asm
; subtract two 4bit numbers on the Intel 4004
; bcd-wise
    FIM R0R1, 0x42 ; initialize R0=2 & R1=4
    FIM R2R3, 0    ; clear result pair
    LD R0          ; load R0 into accumulator
    SUB R1         ; subtract second number
    XCH R1         ; and store in R1
    JCN C, end     ; carry not set when result<0
    LD R1          ; load result into accumulator
    CMA            ; build complement of accu
    CLC            ; clear carry
    IAC            ; increment accu (=> 2-complement)
    XCH R1         ; right result back to R1
    STC            ; set carry to show borrow
    JUN done       ; end 

This short program demonstrates a single digit BCD subtraction on the i4004. As the MCS4 system was originally designed for a printing desktop calculator, binary-coded-decimal arithmetic was one of the main application areas of the MCS4.

To watch the program execution, open the user-interface of the i4004 processor and the i4001 ROM chip memory editor. (On Windows, you may have to resize and move the windows a little, so that all windows remain readable during the simulation.)

Again, you may want to single-step through the program with the technique explained in the MCS4 overview, because the program is so short. Type the value 1.35 into the time-interval textfield in the simulator control panel, and select the us (microseconds) value from the time-scale drop-down list. Reset the simulation by clicking the rewind button. Now, click the run-for button to run and automatically pause the simulation after the selected time interval (here 1.35 microseconds or one MCS4 clock cycle) has elapsed. Repeatedly click the run-for button to step through the program.

See also:

Print version | Run this demo in the Hades editor (via Java WebStart)
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Impressum http://tams-www.informatik.uni-hamburg.de/applets/hades/webdemos/80-mcs4/sub/bcd_sub.html