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Hades Applets contents visual index introduction std_logic_1164 std_logic va... std_logic lo... switches basic gates hex-switch clock generator two-phase clock resolution f... wired-AND demo detectors an... gatelevel circuits delay models flipflops adders and arithm... counters LFSR and selftest memories programmable logic state-machine editor misc. demos I/O and displays DCF-77 clock relays (switch-le... CMOS circuits (sw... RTLIB logic RTLIB registers Prima processor D*CORE MicroJava Pic16 cosimulation Mips R3000 cosimu... Intel MCS4 (i4004) image processing ... [Sch04] Codeumsetzer [Sch04] Addierer [Sch04] Flipflops [Sch04] Schaltwerke [Sch04] RALU, Min... [Fer05] State-Mac... [Fer05] PIC16F84/... [Fer05] Miscellan... [Fer05] Femtojava FreeTTS | Clock generator component Circuit Description This circuit demonstrates the clock generator component, class hades.models.io.ClockGen. The clock generator uses three user-settable timing parameters to specify the clock period (inverse of frequency), the duty-cycle (ratio of the 1-pulse to the clock period), and an initial offset before the generator starts. The three clock generator components in this demonstration are all set to the same, rather slow clock period of 2 seconds, which corresponds to a clock frequency of 0.5 Hz. Due to the different settings of the initial offset, the clock generators start after 2 seconds, 4 seconds, and 6 seconds. Naturally, these values are uncommon large for electronic circuits and are only chosen for demonstration. Just open the property sheet of the clock generators (popup-menu, edit-component) and change the values as you like. The duty-cycle parameter specifies the relative duration of the 1-output during each clock period. A value of 0.5 (50 percent) gives a symmetrical clock signal. See the annotation above for details. | |||
Print version | Run this demo in the Hades editor (via Java WebStart) | ||||
Usage | FAQ | About | License | Feedback | Tutorial (PDF) | Referenzkarte (PDF, in German) | ||||
Impressum | http://tams.informatik.uni-hamburg.de/applets/hades/webdemos/00-intro/05-switches/clockgen.html |