TAMS / Java / Hades / applets (print version): contents | previous | nextD*CORE microcode sequencer demonstration
DescriptionThis applet demonstrates the D*CORE microcode sequencer,
which is the heart of the D*CORE processor control-unit.
This applet is used in the context of the T3 laboratory course
to introduce the basics of a microcoded control-unit.
The circuit consists of three major parts, namely the microcode memory
(uROM), the microcode program counter register (MPC),
and some feedback logic that decides the next microprogram address.
The 4:1 multiplexer is controlled by two bits of the current microcode
output word, and selects one of four different input values:
- leftmost, an external input
- second, the output of the 2:1 multiplexer, which in turn is controlled
by the xs input switch.
In the complete processor, the xs-signal is connected to the carry-flag
and used for conditional jumps.
- the nextA value from the current microcode word,
- the nextB value from the current microcode word.
Open the microcode memory editor and edit the microprogram words
to create an interesting microcode sequence with at least five or six
states.
Double-click the microcode single-bits to switch the bits,
or type in the new values directly.
For details, check the
course material (in German)
on our webserver.
Run the applet | Run the editor (via Webstart)
Impressum | 30.11.06
http://tams.informatik.uni-hamburg.de/applets/hades/webdemos/60-dcore/t3/sequencer_print.html