TAMS / Java / Hades / applets (print version): contents | previous | nextBasic SR flipflops
DescriptionThis circuit demonstrates the basic SR (for set-reset) flipflops
built from NAND and NOR gates.
The typical structure of both circuits are the feedback lines
that connect the output of one gate back to the input of the
other gate.
The behavior of both circuits is very similar; the most important
feature is that the circuits are able to store information.
Please play with the circuits and compare the simulation with
the function (or state) tables on the right of the schematics.
In all normal states, the output of the two gates are
inverse to each other, which means that a flipflop circuit can
generate both the Q output value and the inverted NQ
output value at no extra cost.
Naturally, the so called forbidden states don't damage the circuit,
but they should be avoided because in those states the outputs of the
two gates are not complementary to each other.
Run the applet | Run the editor (via Webstart)
Impressum | 24.11.06
http://tams.informatik.uni-hamburg.de/applets/hades/webdemos/16-flipflops/10-srff/srff_print.html