TAMS / Java / Hades / applets (print version): contents | previous | nextTTL-series 74154 decoder (4:16 bit)
DescriptionThis applet shows the internal structure of the
TTL-series 74154 decoder integrated circuit,
which switches the G input onto 1 out of 16 outputs selected by
the 4-bit address specified by the (D,C,B,A) inputs.
When used as an address decoder, the G1 and G2 inputs are simply
connected to ground, implying that exactly one of the 16 output lines
will be zero.
However, the 74154 chip can also be used as a normal decoder
with the data input connected to G1 and G2.
Obviously, the circuit consists of two separate 2:4 decoders
for the (B,A) and (D,C) pair of address inputs
and a matrix of 4x4 NAND gates,
each of which is connected to one output of the first decoder
and one output of the second decoder.
This organization results in much lower hardware cost
than the equivalent two-level structure built from 16 NAND gates
with four inputs each.
Run the applet | Run the editor (via Webstart)
Impressum | 24.11.06
http://tams.informatik.uni-hamburg.de/applets/hades/webdemos/10-gates/40-mux-demux/SN74154_print.html