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ACTEL ACT1 mux-based AND3 gate

ACTEL ACT1 mux-based AND3 gate screenshot

Description

The ACT1 basic logic cell configured to implement a three-input AND gate.

The A and C inputs are connected to multiplexer inputs; if both inputs are enabled, the circuit output Q is driven by input B. The corresponding logic funtion is the logic AND of all three inputs.

Click the input switches or type the 'a', 'b', and 'c' bindkeys to control the applet.

A variety of other logic functions (with up to eight inputs) can be implemented with a single multiplexer-based cell.

Run the applet | Run the editor (via Webstart)


Impressum | 24.11.06
http://tams-www.informatik.uni-hamburg.de/applets/hades/webdemos/42-programmable/40-mux-fpga/ACT1-and3_print.html