|
Class Summary |
| CounterRE |
CounterRE - an edge-triggered n-bit d-type register with enable and reset. |
| Latch |
Latch - a simple level-triggered n-bit wide latch without enable. |
| LatchR |
LatchR - a simple level-triggered n-bit wide latch with reset |
| LFSR |
LFSR - an edge-triggered 1..32-bit output LFSR register based
on the (31 3 0) polynom. |
| Reg |
Reg - an edge-triggered n-bit d-type register. |
| RegE |
RegE - an edge-triggered n-bit d-type register with enable. |
| RegR |
RegR - an edge-triggered n-bit d-type register with active-low reset. |
| RegRE |
RegRE - an edge-triggered n-bit d-type register with enable and reset. |
| RegWithInitialValue |
RegWithInitialValue - an edge-triggered 1..32-bit output register
which starts in an user-defined initial value instead of XXX. |
| ShiftRegR |
ShiftRegR - an edge-triggered n-bit d-type shift-register with
shift-enable and active-low reset. |