TAMS / Java / Hades / applets (print version): contents | previous | nextLoadable Counter (4 bit)
DescriptionThe 4-bit loadable synchronous counter
used for the output registers (in front of the displays)
of the DCF-77 clock.
The circuit is just a cascade of four 1-bit counters,
connected via their carry-outputs and the count-enable inputs.
For a detailed description, see the previous applet.
Run the applet | Run the editor (via Webstart)
Impressum | 24.11.06
http://tams.informatik.uni-hamburg.de/applets/hades/webdemos/45-misc/80-dcf77/LoadCount4_print.html