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Intel MCS4 (i4004) Counter with Multiplexed Display

Intel MCS4 (i4004) Counter with Multiplexed Display screenshot


This circuit realizes a BCD-counter with multiplexed seven-segment display. The software running on the i4004 microprocessor consists of an (endless) main loop which increments the value stored in the first register of the i4002 RAM IC. To see the assembly source code for the application, click here: zaehler.asm.

As usual for this type of application, the number is stored in BCD encoding, one digit per RAM cell. When you open the property editor of the RAM component, you can watch the counting process. To change the current counter value, just type in new data into the RAM register cells.

After the current counter value has been incremented, the processor enters a subroutine that displays the value on the multiplexed seven-segment display. First, the segment line of the first (least significant) digit is activated via writing the corresponding to the i4003 decoder. Next, the BCD value of the current digit is decoded to an eight-bit code, which is then written to the output ports of the first and second i4001 ROM components. This process is repeated for each of the multiplexed digits, where the next digit is selected simply by asserting one shift-clock for the i4003 decoder.

We use the 'smart' seven-segment displays in the schematics, with the time-constants for the averaging algorithm chosen to to reduce the flickering as much as possible. Please allow for the extra latency introduced by the averaging process - not all seven-segment displays will switch at exactly the same time.

Note: you may want to switch glow-mode off in order to reduce flicker and to speed-up the simulation slightly.

See also:

Run the applet | Run the editor (via Webstart)

Impressum | 24.11.06