TAMS / Java / Hades / applets (print version): contents | previous | nextPRIMA Steuerwerk (control unit)
DescriptionThe control unit ('Steuerwerk') of the PRIMA processor.
It takes the following inputs:
- clock (rising edge)
- nreset (active low)
- external switch_in input
- current instruction (contents of the BR register)
- current accumulator contents
- current ALU overflow signal output
and generates the control signals for the processor.
These are:
- enable signals for the four registers (AR,BR,PC,AKKU)
- control signals for the multiplexers
- ALU function selection
- RAM write enable signal for the store instruction.
Unfortunately, the schematics is not (yet) optimized for
small screen sizes.
Still, several main groups of components are easily distinguished.
On the left side is the small sequencer state machine
that generates the three states of the PRIMA instruction cycle,
namely instruction fetch, address fetch, and execute.
The upper part of the circuit calculates the conditional branch
flag used to control the PC multiplexer.
The value is based on the current instruction, the current
accumulator value (e.g. zero), and the current sequencer state.
The bottom part of the circuit contains the flipflop and logic
to manage the overflow flag.
Finally, the flipflop on the right is used to generate a
(hazard-free) impulse required for the write-enable signal
for the main memory.
Run the applet | Run the editor (via Webstart)
Impressum | 24.11.06
http://tams.informatik.uni-hamburg.de/applets/hades/webdemos/50-rtlib/90-prima/prima-control_print.html
